Partcl
GPU-accelerated electronic design automation tools for chip designers.
Partcl develops GPU-accelerated electronic design automation tools for physical design, covering synthesis, placement, clock-tree synthesis, timing analysis and optimization. The company was founded by two Stanford PhD students and is based in the San Francisco Bay Area.
Its product line includes Boson, an end-to-end GPU-accelerated physical design toolchain covering synthesis, placement, clock-tree synthesis, CCS timing analysis with crosstalk, gate sizing, Vt swapping and buffer insertion; Nucleus, a physical-design database and parser suite; and RTL Super Optimization, an AI-driven design-space exploration tool for power, performance and area. Boson supports signoff-quality results at 7 nm and above, with advanced-node support at 5 nm, 3 nm and below available to enterprise teams.
Partcl is aimed at teams building AI accelerators, mobile SoCs and embedded silicon, and offers free licenses for qualifying students, faculty and academic researchers.
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